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rp2040: Avoid run-time division in hard_pwm.c
Use a MAX_PWM of 256 (instead of 255) to avoid an expensive run-time divide operation. Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
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@@ -14,7 +14,7 @@ config RPXXXX_SELECT
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select HAVE_GPIO_HARD_PWM
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select HAVE_STEPPER_OPTIMIZED_BOTH_EDGE
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select HAVE_BOOTLOADER_REQUEST
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# Software divide needed on rp2040 in i2c rate, hard_pwm rate
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# Software divide needed on rp2040 for rate calculation in i2c.c
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select HAVE_SOFTWARE_DIVIDE_REQUIRED if MACH_RP2040
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config BOARD_DIRECTORY
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@@ -26,7 +26,7 @@ struct gpio_pwm {
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uint8_t shift;
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uint32_t mask;
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};
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struct gpio_pwm gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint8_t val);
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struct gpio_pwm gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint32_t val);
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void gpio_pwm_write(struct gpio_pwm g, uint32_t val);
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struct gpio_adc {
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@@ -13,11 +13,12 @@
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#include "hardware/structs/iobank0.h" // iobank0_hw
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#include "hardware/regs/resets.h" // RESETS_RESET_PWM_BITS
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#define MAX_PWM 255
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#define MAX_PWM 256
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DECL_CONSTANT("PWM_MAX", MAX_PWM);
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struct gpio_pwm
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gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint8_t val) {
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gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint32_t val)
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{
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if(pin >= 30)
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shutdown("invalid gpio pin");
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@@ -88,6 +89,7 @@ gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint8_t val) {
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}
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void
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gpio_pwm_write(struct gpio_pwm g, uint32_t val) {
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gpio_pwm_write(struct gpio_pwm g, uint32_t val)
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{
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hw_write_masked((uint32_t*)g.reg, val << g.shift, g.mask);
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}
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