From 9fb7604353649b8892e97baec04a67fb248392b2 Mon Sep 17 00:00:00 2001 From: Kevin O'Connor Date: Fri, 20 Mar 2026 20:21:02 -0400 Subject: [PATCH] rp2040: Avoid run-time division in hard_pwm.c Use a MAX_PWM of 256 (instead of 255) to avoid an expensive run-time divide operation. Signed-off-by: Kevin O'Connor --- src/rp2040/Kconfig | 2 +- src/rp2040/gpio.h | 2 +- src/rp2040/hard_pwm.c | 8 +++++--- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/src/rp2040/Kconfig b/src/rp2040/Kconfig index 3f40524c0..481761b3d 100644 --- a/src/rp2040/Kconfig +++ b/src/rp2040/Kconfig @@ -14,7 +14,7 @@ config RPXXXX_SELECT select HAVE_GPIO_HARD_PWM select HAVE_STEPPER_OPTIMIZED_BOTH_EDGE select HAVE_BOOTLOADER_REQUEST - # Software divide needed on rp2040 in i2c rate, hard_pwm rate + # Software divide needed on rp2040 for rate calculation in i2c.c select HAVE_SOFTWARE_DIVIDE_REQUIRED if MACH_RP2040 config BOARD_DIRECTORY diff --git a/src/rp2040/gpio.h b/src/rp2040/gpio.h index 23d432f63..cab367a1f 100644 --- a/src/rp2040/gpio.h +++ b/src/rp2040/gpio.h @@ -26,7 +26,7 @@ struct gpio_pwm { uint8_t shift; uint32_t mask; }; -struct gpio_pwm gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint8_t val); +struct gpio_pwm gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint32_t val); void gpio_pwm_write(struct gpio_pwm g, uint32_t val); struct gpio_adc { diff --git a/src/rp2040/hard_pwm.c b/src/rp2040/hard_pwm.c index 5faa6637e..5a6c41fa7 100644 --- a/src/rp2040/hard_pwm.c +++ b/src/rp2040/hard_pwm.c @@ -13,11 +13,12 @@ #include "hardware/structs/iobank0.h" // iobank0_hw #include "hardware/regs/resets.h" // RESETS_RESET_PWM_BITS -#define MAX_PWM 255 +#define MAX_PWM 256 DECL_CONSTANT("PWM_MAX", MAX_PWM); struct gpio_pwm -gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint8_t val) { +gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint32_t val) +{ if(pin >= 30) shutdown("invalid gpio pin"); @@ -88,6 +89,7 @@ gpio_pwm_setup(uint8_t pin, uint32_t cycle_time, uint8_t val) { } void -gpio_pwm_write(struct gpio_pwm g, uint32_t val) { +gpio_pwm_write(struct gpio_pwm g, uint32_t val) +{ hw_write_masked((uint32_t*)g.reg, val << g.shift, g.mask); }